1. Technology Field
The present invention is directed to a data writing method for a rewritable non-volatile memory module, a memory controller and a memory storage device using the method.
2. Description of Related Art
Along with the widespread of digital cameras, cell phones, and MP3 in recently years, the consumers' demand for storage media has increased drastically. Since a rewritable non-volatile memory has the characteristics of non-volatility of data, low power consumption, small volume, non-mechanical structure, and fast reading and writing speed, the rewritable non-volatile memory is the most adaptable memory applied in a portable electronic product, e.g., a notebook computer. A solid state drive (SSD) is a storage apparatus which utilizes a flash memory as its storage medium. Therefore, the flash memory industry has become a very popular part of the electronic industry in recent years.
An NAND flash memory may be classified into a single level cell (SLC) NAND flash memory, a multi level cell (MLC) NAND flash memory, or a trinary level cell (TLC) NAND flash memory according to the number of bits which each memory cell thereof is capable of storing. Specifically, each memory cell in the SLC NAND flash memory can store one bit of data (i.e., “1” or “0”), each memory cell in the MLC NAND flash memory can store two bits of data, and each memory cell in the TLC NAND flash memory can store three bits of data.
In the NAND flash memory, a physical page is composed of several memory cells arranged on the same word line. Since each memory cell in the SLC NAND flash memory can store one bit of data, several memory cells arranged on the same word line in the SLC NAND flash memory correspond to one physical page.
Comparing with the SLC NAND flash memory, a floating gate storage layer in each memory cell of the MLC NAND flash memory can store two bits of data, and each storage state (i.e., “11,” “10,” “01,” or “00”) includes the least significant bit (LSB) and the most significant bit (MSB). For instance, the first bit from the left of the storage states is the LSB, and the second bit from the left of the storage states is the MSB. Accordingly, the several memory cells arranged on the same word line may constitute two physical pages, and herein, the physical pages constituted by the LSB and the MSB of the memory cells are referred to as lower physical pages and upper physical pages, respectively. Specially, a speed of writing data into the lower physical pages is faster than that of writing data into the upper physical pages, and when a program failure occurs in the process of programming the upper physical pages, the data stored in the lower physical pages may be lost.
Similarly, each memory cell in the TLC NAND flash memory can store three bits of data, and each storage state (i.e., “111,” “110,” “101,” “100,” “011,” “010,” “001,” or “000”) includes the first bit (i.e., the LSB), the second bit (i.e., the center significant bit, CSB), and the third bit (i.e., the MSB) from the left of the storage states. Accordingly, the several memory cells arranged on the same word line may constitute three physical pages, in which the physical pages constituted by the LSB, the CSB, and the MSB of the memory cells are referred to as lower physical pages, middle physical pages, and upper physical pages, respectively. In particular, while the several memory cells on the same word lines are programmed, only the lower physical pages can be programmed, or all of the lower, the center, and the upper physical pages need to be programmed before being read, or otherwise, the stored data may be lost. In addition, a number of times of erasing the flash memory are limited by a maximum threshold, and if the number of erasing times reaches the maximum threshold, no erasing operation is allowed any more. Besides, the lower physical pages, the middle physical pages and the upper physical pages are selected to be programmed, the maximum threshold of times of the number of erasing the flash memory will be lower, and namely, the lifespan of the flash memory will be shorter.
On the other hand, within a flash memory storage system, one physical block is constituted of a plurality of physical pages, and when writing data into the physical blocks, data must be written in turn according to the sequence of an arrangement of the physical pages. In addition, the written physical page has to be erased before it is used for writing data again, and one physical block is the minimum unit for erasing. Thus, typically, one physical block is the minimum unit for managing the flash memory. For example, if only a portion of pages in one physical block is updated, valid data in the physical block must be moved to another blank physical block before an erasing operation is performed on the physical block. Herein, the operation performed for moving valid data is referred to as a data merge operation.
In particular, in order to simultaneously perform a writing operation on multiple physical blocks in a parallel write mode to enhance the writing speed, multiple physical blocks are grouped into one physical unit group for management. In the flash memory storage system using one physical unit group as a management unit, the above-mentioned data merge operation is also performed by using the physical unit group as the unit. In particular, if data of only a portion of pages in one physical unit group is updated, the valid data in the physical unit group must be moved to another blank physical unit group before the erasing operation is performed on the physical unit group. Since one physical unit group is constituted of a plurality of physical blocks, it takes more time to perform the data merge operation by using the unit of one physical unit group, and the time for performing the data writing operation will be significantly increased.
Besides, in the flash memory storage system using the unit of one physical unit group, if a host system frequently writes small-volume data (i.e. a volume of the data is smaller than a capacity of one physical unit group), the number of times of erasing the physical blocks will be meaninglessly increased. In particular, if the host system only updates the data in a portion of the physical blocks in the physical unit group, in order to perform the aforementioned data merge operation, the data in the un-updated physical blocks still requires to be moved to another physical unit group so that the erasing operation is performed thereon, and thus, the un-updated physical blocks will also be consumed.
In light of the foregoing, how to prolong the lifespan of the flash memory module and to keep the writing speed of the flash memory module at the same time is one of the major subjects for persons skilled in the industry.
Nothing herein should be construed as an admission of knowledge in the prior art of any portion of the present invention. Furthermore, citation or identification of any document in this application is not an admission that such document is available as prior art to the present invention, or that any reference forms a part of the common general knowledge in the art.